Difference between revisions of "Programming the FPGA"
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* A(4:0) is a 5-bit address to select the target DAC channel. | * A(4:0) is a 5-bit address to select the target DAC channel. | ||
| − | * DB(13:0) is a 14-bit voltage code, where <math>V_{out} = 50*V_{REF IN}*\frac{DB(13:0)}{2^14}</math> | + | * DB(13:0) is a 14-bit voltage code, where |
| + | :<math>V_{out} = 50*V_{REF\,IN}*\frac{DB(13:0)}{2^{14}}</math> | ||
=== Emulator === | === Emulator === | ||
Revision as of 18:51, 5 July 2007
The FPGA is the hub of the digital control board and all other chips are connected to and controlled by it. This article discusses the programming of the FPGA. All code is written in VHDL. For the purposes of testing, each chip has not only a controller written for it, but an emulator as well.
The DAC
Interface
The AD5535 Digital-to-Analog Converter has a three-wire serial interface and an inverted-logic reset signal. A serial communication transfers one 19-bit word:
| A | DB | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 04 | 03 | 02 | 01 | 00 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
- A(4:0) is a 5-bit address to select the target DAC channel.
- DB(13:0) is a 14-bit voltage code, where