Although the Overall Effort Level (-ol) for this implementation has been set to Standard, Placer will run at effort level High. To override this, please set the Placer Effort Level (-pl) to Standard. The PAR option, "-t" (Starting Placer Cost Table), will be disabled in the next software release when used in combination with MAP -timing(Perform Timing-Driven Packing and Placement) or when run with V5 or newer architectures. To explore cost tables, please use the MAP option, "-t" (Starting Placer Cost Table), instead. No user timing constraints were detected or you have set the option to ignore timing constraints ("par -x"). Place and Route will run in "Performance Evaluation Mode" to automatically improve the performance of all internal clocks in this design. Because there are not defined timing requirements, a timing score will not be reported in the PAR report in this mode. The PAR timing summary will list the performance achieved for each clock. Note: For the fastest runtime, set the effort level to "std". For best performance, set the effort level to "high". SmartGuide was run during Map. Since all guiding (mapping, packing, placement and routing) is completed in MAP, PAR does not require the use of the guide switches. The -smartguide switch only generates a post place and route guide report in the SmartGuide Report File(.GRF). Runtime can be reduced, if this detailed report is not generated. PAR will automatically generate the SmartGuide summary report based on the guide file used during MAP. This summary information is always in the PAR report file and the GRF. N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value. CLK Net:uResS/Done_Byte may have excessive skew because 2 CLK pins and 0 NON_CLK pins failed to route using a CLK template. CLK Net:uXmit/uSpack/Done_Word may have excessive skew because 2 CLK pins and 0 NON_CLK pins failed to route using a CLK template. CLK Net:db0/u0/serClk may have excessive skew because 0 CLK pins and 1 NON_CLK pins failed to route using a CLK template. CLK Net:db0/u2/Q may have excessive skew because 1 CLK pins and 11 NON_CLK pins failed to route using a CLK template. CLK Net:uXmit/uDpack/Done_Word may have excessive skew because 1 CLK pins and 1 NON_CLK pins failed to route using a CLK template. CLK Net:uXmit/uTxMAC/u1/Q may have excessive skew because 0 CLK pins and 3 NON_CLK pins failed to route using a CLK template. CLK Net:ser_Go_uINT may have excessive skew because 1 CLK pins and 11 NON_CLK pins failed to route using a CLK template. CLK Net:Rst_int may have excessive skew because 0 CLK pins and 77 NON_CLK pins failed to route using a CLK template. CLK Net:uXmit/uDpack/u1/Q may have excessive skew because 0 CLK pins and 11 NON_CLK pins failed to route using a CLK template. CLK Net:uXmit/uDpack/w/C_0_0_not0000 may have excessive skew because 0 CLK pins and 7 NON_CLK pins failed to route using a CLK template. CLK Net:uQuer/u3/u1/Q may have excessive skew because 3 CLK pins and 18 NON_CLK pins failed to route using a CLK template. CLK Net:uINT/u4/u2/Q may have excessive skew because 1 CLK pins and 12 NON_CLK pins failed to route using a CLK template. N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.