vhdl FPGA_BasicComp "../MiscComp/Pulser/Pulser.vhd"
vhdl FPGA_BasicComp "../MiscComp/delay.vhd"
vhdl FPGA_BasicComp "../MiscComp/Reg8bit.vhd"
vhdl FPGA_BasicComp "../Includes.vhd"
vhdl FPGA_BasicComp "../EthCtrl/MiscComp/wrToAddr/wrToAddr.vhd"
vhdl FPGA_BasicComp "../MiscComp/Counter4bit.vhd"
vhdl FPGA_BasicComp "../EthCtrl/MiscComp/wr2BToAddr/wr2BToAddr_good.vhd"
vhdl work "../EthCtrl/MiscComp/RAwr2BtoAddr.vhd"
vhdl FPGA_BasicComp "../EthCtrl/MiscComp/MACwrToAddr.vhd"
vhdl FPGA_BasicComp "../EthCtrl/MiscComp/getByte/getByte.vhd"
vhdl FPGA_BasicComp "../MiscComp/StepCounter16bit.vhd"
vhdl FPGA_BasicComp "../MiscComp/Reg64x8bit_wPrim.vhd"
vhdl FPGA_BasicComp "../MiscComp/Reg32x14bit_wPrim.vhd"
vhdl FPGA_BasicComp "../MiscComp/EdgeCounter4bit.vhd"
vhdl FPGA_BasicComp "../MiscComp/Counter7bit.vhd"
vhdl FPGA_BasicComp "../MiscComp/Counter12bit.vhd"
vhdl work "../EthCtrl/Transmitter/wrMACaddrs.vhd"
vhdl work "../EthCtrl/Transmitter/S-Packet.vhd"
vhdl work "../EthCtrl/Transmitter/D-Packet.vhd"
vhdl work "../EthCtrl/Reset/MACaddrLoad.vhd"
vhdl FPGA_BasicComp "../EthCtrl/Querier/GetTempVal.vhd"
vhdl work "../EthCtrl/Querier/GetADCval.vhd"
vhdl work "../EthCtrl/MiscComp/AutoRd.vhd"
vhdl FPGA_BasicComp "../SerialOut.vhd"
vhdl work "../EthCtrl/Transmitter/Transmitter_ctrl.vhd"
vhdl work "../EthCtrl/Transceiver/Transceiver_ctrl.vhd"
vhdl work "../EthCtrl/Reset/Reset_soft.vhd"
vhdl work "../EthCtrl/Reset/Reset_hard.vhd"
vhdl work "../EthCtrl/Register/TempReg.vhd"
vhdl work "../EthCtrl/Register/statereg.vhd"
vhdl work "../EthCtrl/Register/MACregs.vhd"
vhdl work "../EthCtrl/Register/DACregs.vhd"
vhdl work "../EthCtrl/Register/ADCregs.vhd"
vhdl work "../EthCtrl/Reader/Reader_ctrl.vhd"
vhdl work "../EthCtrl/Querier/Query_coord.vhd"
vhdl work "../EthCtrl/Programmer/Programmer_ctrl.vhd"
vhdl work "../EthCtrl/MiscComp/INTCatcher/INTCatcher.vhd"
vhdl work "../EthCtrl/Idler/Idler_ctrl.vhd"
vhdl FPGA_BasicComp "../DAC_v2/DAC_controller.vhd"
vhdl work "../Config.vhd"
vhdl FPGA_BasicComp "../MiscComp/Reg256x8bit_wPrim.vhd"
vhdl work "../FPGA_ctrl.vhd"