The MAP option "No logic replication" (-l) is being deprecated in the next major software release. There will be a smaller percentage of guiding when using SmartGuide with the some of the physical synthesis options. These options include: "Combinatorial Logic Optimization"(-logic_opt),"Global Optimization"(-global_opt), and "Register Duplication"(-register_duplication). The command line used to create the guide file is: -ise TotalTest.ise -intstyle ise -p xc3s50a-vq100-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication off -cm area -detail -ir all -ignore_keep_hierarchy -pr b -ntd -bp -smartguide FPGA_ctrl_guide.ncd -power off -o FPGA_ctrl_map.ncd FPGA_ctrl.ngd FPGA_ctrl.pcf The command line used for this run is: -ise TotalTest.ise -intstyle ise -p xc3s50a-vq100-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication off -cm area -detail -ir all -ignore_keep_hierarchy -pr b -l -ntd -bp -smartguide FPGA_ctrl_guide.ncd -power off -o FPGA_ctrl_map.ncd FPGA_ctrl.ngd FPGA_ctrl.pcf If one or more of the above physical synthesis options is being used, SmartGuide will have a lower guide percentage, possibly longer runtimes and possibly worse timing scores. If the physical synthesis option is required to meet timing, it is suggested that SmartGuide is not used. If the physical synthesis option is not required, it is suggested to re-create the guide without the physical synthesis option and re-run SmartGuide Logical network db_serial has no load. Logical network STARTUP_SPARTAN3A_inst/GSR_INT has no load. Logical network STARTUP_SPARTAN3A_inst/GTS_INT has no load. No environment variables are currently set. The following NGM file is used during SmartGuide: "FPGA_ctrl_map.ngm". The NGM file contains information on how the guide file was originally mapped. It is required for the best SmartGuide results. All of the single ended outputs in this design are using slew rate limited output drivers. The delay on speed critical single ended outputs can be dramatically reduced by designating them as fast outputs. Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000 Celsius) Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts) The design does not fit in device. Total LUT Utilization : 1200 out of 1408 LUTs used as Logic : 1080 LUTs used as Memory : 120 FF Utilization : 1504 out of 1408 The timing-driven placement phase encountered an error.