<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
   <wave_state>
   </wave_state>
   <db_ref_list>
      <db_ref path="C:/work/GlueX/Tagger/Electronics/FPGA/TotalTest/SerialOutFIFO_test_isim_beh.wdb" id="1" type="auto">
         <top_modules>
            <top_module name="basiccomp" />
            <top_module name="serialoutfifo_test" />
            <top_module name="std_logic_1164" />
            <top_module name="std_logic_arith" />
            <top_module name="std_logic_unsigned" />
         </top_modules>
      </db_ref>
   </db_ref_list>
   <wvobject fp_name="/serialoutfifo_test/clk_period" type="other" db_ref_id="1">
      <obj_property name="ElementShortName">clk_period</obj_property>
      <obj_property name="ObjectShortName">clk_period</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/clk" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">clk</obj_property>
      <obj_property name="ObjectShortName">clk</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/rst" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">rst</obj_property>
      <obj_property name="ObjectShortName">rst</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/ser_go" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ser_go</obj_property>
      <obj_property name="ObjectShortName">ser_go</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/ser_d" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">ser_d[7:0]</obj_property>
      <obj_property name="ObjectShortName">ser_d[7:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/db_serial" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">db_serial</obj_property>
      <obj_property name="ObjectShortName">db_serial</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/ser_done" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ser_done</obj_property>
      <obj_property name="ObjectShortName">ser_done</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/ser_en_permit" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ser_en_permit</obj_property>
      <obj_property name="ObjectShortName">ser_en_permit</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/ser_en" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ser_en</obj_property>
      <obj_property name="ObjectShortName">ser_en</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/queue" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">queue[3:0]</obj_property>
      <obj_property name="ObjectShortName">queue[3:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/u0/en" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">en</obj_property>
      <obj_property name="ObjectShortName">en</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/u0/serclk" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">serclk</obj_property>
      <obj_property name="ObjectShortName">serclk</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/u0/sercnt" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">sercnt[3:0]</obj_property>
      <obj_property name="ObjectShortName">sercnt[3:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/serialoutfifo_test/uut/u0/reg" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">reg[7:0]</obj_property>
      <obj_property name="ObjectShortName">reg[7:0]</obj_property>
   </wvobject>
</wave_config>
